The invention relates to a semiconductor device comprising a semiconductor body which is provided with a lateral MOS transistor at a surface and which comprises a comparatively weakly doped region of a first conductivity type adjoining the surface and provided with a strongly doped source and drain zone of the opposed, second conductivity type, and with a weakly doped drain extension between the drain zone and a channel region which extends between the drain extension and the source zone, while a gate electrode is situated above the channel region and electrically insulated therefrom, an electrically insulating layer being laid over the surface and being provided with contact windows above the source and drain zones, through which contact windows the source zone and the drain zone are connected to a metal source contact and a drain contact, respectively.
Such transistors, which may be constructed both in discrete and in integrated form, are known, for example, from the article "High performance silicon LDMOS technology for 2 GHz RF power amplifier applications", by A. Wood et al., published in IEDM 96, pp. 87-90. The transistor is formed in a weakly doped p-type epitaxial layer on a strongly doped p-type substrate. The channel is defined in a p-type zone which is implanted into the epitaxial layer in a self-aligned manner with respect to the polycrystalline silicon gate electrode. The source and drain zones may have an interdigitated structure, the number of digits being chosen, for example, in dependence on the maximum electric current to be accommodated. The drain extension serves to increase the breakdown voltage between source and drain, as is generally known.
In this known transistor, the metal source contact overlaps the gate electrode and forms a screen between the drain contact and the gate electrode. The capacitance between the drain and the gate electrode is considerably reduced thereby, which leads inter alia to a major increase in the power gain at higher frequencies. A disadvantage of this overlapping source contact is that additional measures are to be taken for reducing the resistance of the gate electrode. The gate electrode in the known transistor is silicided for this purpose. Not only does this require additional process steps, but the resulting resistance of the silicided gate is still comparatively high, which in its turn leads to a lower power gain.
The invention has for its object inter alia to provide a transistor in which a lower gate resistance can be obtained than that which is possible with silicide, while a low gate-drain capacitance is retained, without additional process steps being necessary.
According to the invention, a semiconductor device of the kind described in the opening paragraph is for this purpose characterized in that the insulating layer is in addition provided with at least one contact window above the gate electrode, through which window the gate electrode is connected to a metal gate electrode contact, the contacts having the shape of parallel metal strips lying next to one another, and in that a further metal strip is provided which extends over the electrically insulating layer between the gate electrode contact strip and the drain contact strip and which is locally connected to the source contact strip, forming a screen between the gate electrode strip and the drain contact strip. Since the metal source contact is not provided above the gate electrode, the gate electrode can be provided with a metal connection over its entire length so that the gate resistance is determined by the layer resistance of the metal, and can accordingly be kept very low through the use of a well conducting metal. No additional process steps are necessary, moreover, because the metal contact of the gate electrode can be manufactured in the same metal layer as the source and drain contacts.
A simple embodiment of a semiconductor device according to the invention is characterized in that the screen strip is connected to the source contact strip adjacent an end face of the gate electrode contact strip.
The invention may be used to advantage in transistors (n-channel or p-channel) in which the channel is formed by a surface region of the semiconductor body. A preferred embodiment of a device according to the invention is characterized in that the transistor is of the lateral DMOS type.
These and other aspects of the invention will be explained in detail with reference to an embodiment. In the drawing: